Severity:
Status:
Code:
Description: Inverted Logic Lag Circuits cause severe game time lag, halting all movement and updates. These circuits can be as simple as connecting the output of a NOT Gate to its input.
Cause: Such circuits endlessly attempt to find a stable configuration but fail, cycling through all possible states. For example, in a NOT Gate loop, the high signal from the output switches the input, switching the output to low, which then switches the output high again, creating an endless loop. Minecraft detects excessive neighbor updates and tries to stop the updates, but the delays in updates are still noticible.
Consequences: Severe delay in game time and so Lag.
A loop composed of an odd number of Signal Inverting Gates also causes lag. Signal Inverting Gates include, but are not limited to:
- NOT
- XOR
- NAND
- NOR
- NXOR
- Analog Subtractor
- Analog Differential
- Inverted Comparator
- Parallel Gate variants of these gates
Depending on the configuration, lag may begin immediately after building the circuit or when controlled by a Redstone signal. A single NAND Gate can form the simplest controlled Inverted Logic Lag Circuit.
Safe Configurations: Use Redstone Repeaters, or Delayers to delay input updates and prevent the rapid feedback loop.
Partially Resolved: IVersion 0.3.2 introduces an update chain limit, configurable with commands: /redstonecg_gameplay gateChainLimit and /redstonecg_gameplay wireChainLimit. Both control how many gates and wires can update in a chain from an update event. When the limit is reached, the gates and wires to be updated are scheduled in the next tick. The lag is still present when regular Redstone Dust is used.
